This invention relates to trench-gate field-effect transistors, for example power MOSFETs for fast switching applications, and further relates to methods of manufacturing such transistors.
Trench-gate field-effect transistors are known comprising a semiconductor body, in which an insulated trench extends from a surface of the body into a drain region of the transistor, and a gate electrode comprising a semiconductor material of one conductivity type is present in at least an upper part of the trench to form an insulated gate of the transistor. In the transistors for fast switching that are disclosed in U.S. Pat. No. 5,998,833, a lower electrode is present in a lower part of the trench and is connected to a source of the transistor to shield the insulated gate from most of the drain region. By this means, the gate-drain capacitance is reduced. The whole contents of U.S. Pat. No. 5,998,833 are hereby incorporated herein as reference material.
The lower electrode is also of semiconductor material of the one conductivity type (typically n-type polycrystalline silicon) and is insulated from the gate electrode by an intermediate insulating layer between the lower and upper parts of the trench. The source electrode of the transistor is connected to the lower electrode outside the plane of the drawings in U.S. Pat. No. 5,998,833. This connection is not straightforward, in that it presumably requires (1) the intermediate insulating layer to be locally removed or locally not provided, but (2) the connection still to be isolated from the gate electrode.
It is an aim of the present invention to provide further improvement of a trench-gate field-effect transistor for fast switching applications and to facilitate its manufacture.
According to one aspect of the present invention, there is provided a trench-gate field-effect transistor having a lower electrode that comprises a semiconductor material of opposite conductivity type in the lower part of the trench. By forming a p-n junction with the gate electrode, this opposite type material of the lower electrode avoids the prior-art need for an intermediate insulating layer between the lower electrode and the gate electrode. By connecting this opposite type material of the lower electrode to a source of the transistor, the gate electrode of the transistor is shielded from most of the drain region. Thereby, the gate-drain capacitance is reduced, and a fast switching characteristic can be achieved for the transistor. Furthermore, by forming the p-n junction with the gate electrode, the opposite type material of the lower electrode may additionally provide a p-n protection diode between the gate electrode and source of the transistor.
Such a device can have the features set out in claim 1.
Under normal operating conditions, the gate bias with respect to the source is less than the zener breakdown voltage or avalanche breakdown voltage of the p-n junction. As such, it will reverse bias the p-n protection diode in a blocking state. However, this diode will conduct when the source-gate voltage exceeds the zener or avalanche breakdown voltage. Thereby, the gate dielectric can be protected from damage that might otherwise result from, for example, a buildup of static charge on the insulated gate or with an excess voltage from a gate driver circuit.
The source connections to the lower electrode may be made at distributed locations in the device layout. This is particularly advantageous for a power transistor, in which there may be a considerable length of gate trench throughout the layout of the device. The spacing of these source connections can be sufficiently close to ensure that the displacement current from the capacitance between the drain and this lower electrode is conducted away efficiently through the series resistance of the lower electrode.
Although the inclusion of the lower electrode in the lower part of the trench increases the gate-source capacitance, its junction capacitance can be reduced by appropriate choice of doping concentrations. Thus, the spread of the depletion layer can be widened in the lower electrode by making its semiconductor material only lightly doped at least adjacent to the p-n junction. Furthermore, for the same reason, the gate electrode may be made lightly doped adjacent to the p-n junction.
Devices in accordance with the invention can be manufactured advantageously using a method according to a second aspect of the invention. Such a method can have, for example, the features set out as follows:
A first simple but convenient process for forming the lower electrode and gate electrode involves the steps of:
depositing semiconductor material for providing an electrode of a first conductivity type in the insulated trench and etching it back so as to remain in only the lower part of the trench, and
then depositing semiconductor material of a second conductivity type on the remaining semiconductor material of the first conductivity type so as to provide the gate electrode in the upper part of the trench and to form the intermediate p-n junction.
A second simple but convenient process for forming the lower electrode and gate electrode involves the steps of:
depositing semiconductor material for providing an electrode of a first conductivity type in the insulated trench, and
doping the deposited semiconductor material in the upper part of the trench with dopant of a second conductivity type so as to provide the gate electrode in the upper part of the trench and to form the intermediate p-n junction between the gate electrode and a remaining lower electrode of the first conductivity type.
Because the lower electrode forms a p-n junction with the gate electrode, it is self-isolated from the gate electrode. This construction of gate electrode and lower electrode opens up several possibilities for providing, in a simple and convenient manner, an electrical connection between the lower electrode and a source of the transistor.
Particular examples of such processes for providing the desired connection include:
masking a source-connection area of the trench when etching back the electrode material in the upper part of the trench in the first process;
masking a source-connection area of the electrode material in the trench when carrying out the doping of the second conductivity type (to provide the gate electrode) in the second process;
locally doping with dopant of the first conductivity the semiconductor material in the upper part of the trench at a source-connection area;
etching away the semiconductor material of the gate electrode at an isolated gate area to form a contact hole to the lower electrode.